SAN JOSE, CA and CAMBRIDGE, UK, Sep 15, 2026 – Riverlane has validated its QEC Interface (QECi) design example on an Altera Agilex 7 FPGA and published the design in its open-source QECi repository on GitHub. The work is part of a partnership with Altera to help quantum hardware developers build control and error-correction systems that process quantum data in parallel and move correction information through the control stack in time. Riverlane has also joined the Altera Solutions Acceleration Partner Program (ASAP).
QECi sets a standard for how error-correction data moves between quantum control systems and QEC hardware, so developers can pair different technologies as quantum architectures change. High-speed transceivers on the Agilex 7 FPGA carry that data at low latency. On Agilex hardware the interface runs with low latency for real-time error correction.
“Quantum error correction requires tremendous parallel processing, high-speed connectivity and predictable timing as systems scale,” said Farhad Shafai, vice president of business solutions at Altera. “Riverlane’s validation of its low-latency QECi protocol on Agilex 7 and Agilex 9 FPGAs demonstrates how our programmable platforms can efficiently connect quantum control and error-correction technologies.”
Agilex 7 FPGAs and SoCs combine programmable fabric and dense I/O. Altera rates the parts at 2x better performance per watt than 7nm FPGAs. Developers can apply those resources to parallel processing for qubit control, readout and QEC data paths.
“Riverlane is focused on making quantum error correction practical across the full quantum-computing ecosystem,” said Marco Ghibaudi, vice president of engineering at Riverlane. “Validating the QECi design example on Altera Agilex hardware demonstrates how an open interface can help connect quantum control systems with real-time error-correction technology and gives developers an accessible way to begin evaluating the integration.”
The Agilex portfolio also carries F-Tile high-speed transceivers on the Agilex 7 and Agilex 9 Direct RF FPGAs with integrated data converters, featuring up to 64 Gsps of sample rate and 36 GHz of RF range.
Source: Altera
About Altera
Altera is a semiconductor company founded in 1983 and based in San Jose, CA. The company designs programmable logic devices, including field-programmable gate arrays and complex programmable logic devices, along with related software tools. Engineers use these products to build configurable hardware for communications, computing, industrial, automotive and aerospace systems. Altera serves system designers, equipment manufacturers and technology companies that integrate programmable logic into network infrastructure, data centers and embedded applications. The company became part of Intel’s solutions business and later reestablished operations with majority investment from Silver Lake, while Intel retained a minority stake. Altera serves about 14,000 customers worldwide and employs approx. 3,000 people across North America, Europe and Asia. The company supplies chips and development tools that support flexible hardware design in electronic systems.
About Riverlane
Riverlane is a quantum computing technology company founded in 2016 and headquartered in Cambridge, United Kingdom. The company develops hardware and software for quantum error correction in quantum computing systems. Its Deltaflow system combines error correction chips, decoders, compilers and control software for real-time operation. Riverlane also develops Deltakit, an open-source toolkit for designing, testing and analyzing quantum error correction methods. The company works with quantum computer manufacturers, research laboratories, high-performance computing centers and government organizations. Its technology supports development of fault-tolerant quantum systems across different qubit architectures. Riverlane also operates offices in Boston and Delft, Netherlands. Steve Brierley founded the company after working as a University of Cambridge research fellow.
