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New MIT Chip Stacking Method Cuts Energy Waste in AI Hardware

by | Jan 15, 2026

By placing memory and logic directly together on a chip, researchers aim for faster performance and lower power use in future computing.
Scientists created a “back-end memory transistor” comprising both a logic element (the transistor) and a memory element (source: Christine Daniloff, MIT; iStock).

 

Researchers at MIT have reported a chip architecture breakthrough that could reduce the energy computers waste, especially in artificial intelligence workloads, tells Live Science. Traditional chips separate logic circuits, which do computations, from memory circuits that store data. That forces data to travel long paths between the two, consuming power and slowing performance. MIT’s approach stacks both logic and memory elements on top of each other at the back end of a semiconductor chip. This vertical integration shortens data paths and reduces energy lost in transport.

The core of the innovation is a so-called memory transistor that combines a logic element and a memory component in a single nanoscale device. Because these elements sit next to each other rather than far apart, the chip uses less energy for data movement. Data centers and AI systems use large amounts of electricity, much of it tied to shuttling bits around inside chips. The MIT team presented this work at the International Electron Devices Meeting, showing that the new structure switches quickly and operates at low voltages compared with typical memory transistors.

Achieving this stacking without damaging components requires careful materials engineering. The researchers used indium oxide for the logic layer because it can be deposited at low temperatures, preventing damage to existing circuitry. A thin layer of ferroelectric hafnium-zirconium-oxide on top serves as memory. Building the memory transistor on the chip’s wiring side increases integration density without compromising performance.

Reducing the energy AI systems need is becoming urgent as data centers grow more power hungry. The International Energy Agency projects data-center electricity demand could climb sharply by 2030, driven in part by AI. Early prototypes of MIT’s stacked devices show promise for lowering that burden, though integrating them into full systems remains future work. Continued development could shape next-generation processors that are both faster and more energy conscious.