For decades, semiconductor engineers have made transistors smaller so more can fit on a chip, increasing computing power. Artificial intelligence is intensifying that demand, but researchers are approaching physical and economic limits that could change the way future processors are designed, tells Live Science.
Transistors are tiny electronic switches that control the movement and storage of digital information. Modern chips contain billions of them, operating billions of times per second. Researchers have already demonstrated experimental devices in which a single atom controls electron flow, meaning the switching element itself has reached the smallest physically possible scale. However, the complete transistor remains much larger.
New materials could enable further miniaturization. Researchers recently created nanoribbon transistors using two-dimensional semiconductors, including tungsten disulfide, with channel widths of 25 nanometers. Because these materials can be only one or a few atoms thick, engineers can control electrical current more precisely than with conventional silicon.
Silicon transistors are expected to continue shrinking during the next decade, although at a slower pace. Moving significantly further may require atomically thin semiconductors. But laboratory demonstrations are only part of the challenge. Manufacturers must reliably produce billions of transistors at commercially viable costs.
Energy efficiency is another constraint. Adding more transistors without reducing their individual power consumption increases overall electricity demand and heat generation. This is especially important for AI hardware, where high-performance data-center GPUs already consume substantial amounts of power.
As conventional scaling becomes more difficult, engineers are increasingly looking upward. Instead of only shrinking transistors, manufacturers can stack them vertically, allowing more computing elements within the same chip area.
Future semiconductor progress therefore will not depend on size alone. Engineers must balance four interconnected goals: smaller dimensions, higher speed, lower cost, and greater energy efficiency. New materials and 3D architectures could keep computing performance advancing even as traditional transistor scaling approaches its fundamental limits.
