In late February 2026 at DesignCon, Mark Ren, founder and CEO of Agentrys, outlined a vision for semiconductor development driven by agentic artificial intelligence (AI). Agentic AI refers to systems that go beyond question-and-response models to take autonomous actions toward defined goals—reasoning, planning, learning, and executing tasks with minimal human hand-holding. Ren argues that this shift, which he calls agentic design automation (ADA), could be the next major step in electronic design automation (EDA), taking chip engineering well past the limits of current tools, tells Design News article.
Chip design has historically grown more complex as transistor counts climbed from thousands to hundreds of billions. Traditional EDA tools automate many steps, but engineers still spend large parts of the design cycle on verification, debugging, and manual optimization loops. Agentic AI promises to handle these workflows in more autonomous ways by breaking down design goals into subtasks and coordinating agents to execute them, generating verification assets, analyzing results, closing timing, and even suggesting architecture-level improvements with less human intervention.
Ren pointed out that existing generative AI and early automation have helped at lower levels of the flow, but full productivity gains will require tools that can reason about rules, constraints, and trade-offs across multiple stages of a design. In Ren’s talk and subsequent interviews, he noted that agentic systems could take over repetitive engineering tasks, freeing human experts to focus on strategic decisions and higher-level thinking. But he also acknowledged limitations: agents today lack deep domain knowledge and still require human-supplied data and guidance for critical decisions.
Industry observers see agentic AI as part of a broader shift in EDA and semiconductor engineering. Firms embedding autonomous agents into workflows, from verification to physical implementation, are already reporting improved efficiency and acceleration of key steps. The technology’s promise lies not only in speeding chip design cycles but also in helping address the talent shortage in the semiconductor industry by amplifying engineers’ effectiveness.