LONDON, UK and TORONTO, Canada, Oct 3, 2025 – Alphawave Semi announced the tape-out of its UCIe 3D IP on TSMC SoIC (SoIC-X) technology in the 3DFabric platform. This milestone expands Alphawave Semi‘s UCIe IP subsystems. It advances chiplet integration for data center, AI, and high-performance computing applications. By leveraging TSMC’s SoIC-X 3D packaging technology, Alphawave Semi continues to push the boundaries of power and performance efficiency.
The IP supports face-to-face (F2F) configurations and improves a 10x improvement in power efficiency compared to traditional 2.5D die-to-die interfaces. It also delivers up to a 5x improved signal density.
AI models are becoming larger and complex, making traditional scaling methods like Moore’s Law insufficient to meet the needs for performance, efficiency, and memory bandwidth. In planar designs, chips communicate along the edges, but perimeter space restricts bandwidth and functionality within a single package.
To address these limits, designers are moving beyond monolithic SoCs toward disaggregated architectures. Advanced packaging combines memory, I/O, and logic by expanding silicon horizontally or stacking dies vertically. 3D die stacking provides higher bandwidth density and better power efficiency, offering a practical path forward for next-gen computing systems.
Alphawave Semi’s UCIe-3D 5nm bottom die supports TSVs to deliver power and ground to the 3nm top die. The company’s 3DIO portfolio includes a proprietary design flow and methodology that supports construction and verification of 3D stacks.
“This successful tape-out represents a significant milestone for Alphawave Semi and our AI platform,” said Mohit Gupta, executive vice president & general manager, Alphawave Semi. “By combining our high-speed 3D UCIe IP with TSMC’s groundbreaking SoIC-X technology, we are directly addressing the memory and bandwidth bottlenecks that limit our customers’ next-generation AI and HPC applications. This is a testament to our team’s innovation and our commitment to enabling a new class of chiplet-based systems.”
“Siemens is pleased to partner with Alphawave Semi to offer both their industry leading 3DIO IP and Siemens’ advanced 3D IC design and verification platforms,” said Juan C. Rey, senior vice president and general manager, calibre product line, Siemens Digital Industries Software. “This collaboration reflects our shared vision of delivering compelling IP and robust design and verification platforms to our shared customers. Together we are enabling early-stage analysis of critical electrical and thermal parameters that drive the performance, efficiency, and reliability of next-generation 3D IC systems.”
“The partnership we have with our Open Innovation Platform (OIP) design ecosystem partners like Alphawave Semi is essential for enabling our mutual customers to fully harness TSMC’s industry-leading 3DFabric advanced packaging and 3D stacking technologies in their designs,” said Aveek Sarkar, director of the ecosystem and alliance management division at TSMC. “This latest collaboration with Alphawave Semi, advancing UCIe-3D IP on the SoIC-X platform, is a prime example of our drive to enable energy efficiency and higher performance in AI systems, helping our customers push the envelope of product innovation.”
Source: Alphawave Semi
About Alphawave Semi
Alphawave Semi, founded in 2017 and based in Toronto, Canada, develops semiconductor solutions focused on high-speed connectivity for data-intensive applications. The company designs silicon and intellectual property used in data centers, telecommunications, and high-performance computing. Its products support industries such as cloud infrastructure, 5G networks, AI, and enterprise storage by enabling faster and efficient data transfer. Alphawave has experienced revenue growth, surpassing CAD 100 million annually. The company’s technology addresses the need for higher bandwidth and lower latency in modern digital systems. By focusing on scalable and innovative connectivity solutions, Alphawave aims to meet the demands of next-generation data centers and communication networks. Its position reflects the need for specialized semiconductors to handle advancing data transmission demands.