SAN JOSE, CA, May 12, 2025 – Cadence has unveiled the Tensilica NeuroEdge 130 AI Co-Processor (AICP), a compact, power-efficient solution built to accelerate next-generation agentic and physical AI workloads across automotive, consumer, industrial, and mobile SoCs. Designed to work with any neural processing unit (NPU), the NeuroEdge 130 delivers area and energy savings – over 30% and 20% respectively – without compromising performance. Backed by the trusted Tensilica Vision DSP architecture and compatible with existing AI software stacks, this co-processor is drawing interest across multiple industries.
“With the rapid proliferation of AI processing in physical AI applications such as autonomous vehicles, robotics, drones, industrial automation and healthcare, NPUs are assuming a more critical role,” said Karl Freund, founder and principal analyst of Cambrian AI Research. “Today, NPUs handle the bulk of the computationally intensive AI/ML workloads, but a large number of non-MAC layers include pre- and post-processing tasks that are better offloaded to specialized processors. However, current CPU, GPU and DSP solutions involve trade-offs, and the industry needs a low-power, high-performance solution that is optimized for co-processing and allows future proofing for rapidly evolving AI processing needs.”
The Tensilica NeuroEdge 130 AI Co-Processor (AICP) introduces a flexible, high-efficiency approach to edge AI acceleration – compatible with custom NPUs, Cadence Neo NPUs, and third-party AI cores. Optimized for offloading, it processes AI tasks with greater responsiveness and efficiency than fixed-function designs. By building on the strengths of Tensilica DSPs, the NeuroEdge 130 achieves over 30% area savings and cuts dynamic power and energy use by more than 20%, maintaining competitive AI performance. For developers, the co-processor offers a scalable way to enhance AI without added chip complexity. Other benefits include:
- VLIW-based SIMD architecture with configurable options enables efficient processing and low power consumption
- Issues instructions and commands to the NPU as a control processor
- Optimized ISA and instructions run non-NPU optimal tasks such as ReLU, sigmoid, tanh and more
- Provides programmability, flexibility and future-readiness to the AI subsystem, allowing end-to-end execution of unseen and future AI workloads
“Cadence has proven AI co-processor use cases with our Tensilica DSPs. With AI workloads transforming and becoming less domain-specific, our AI SoC and systems customers have been seeking a small and efficient AI-focused co-processor for better PPA and future-proofing,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “Continuing our track record of IP innovations, we’ve introduced a purpose-built new class of processor. Designed as an NPU companion, the Tensilica NeuroEdge 130 AICP raises the bar for performance efficiency to address our customers’ most demanding AI applications.”
“AI and computer vision are playing an important role in a growing range of embedded applications,” said Jeff Bier, founder of the Edge AI and Vision Alliance. “But AI models and associated pre- and post-processing steps are evolving rapidly; for example, today many developers are adopting transformer-based multimodal models and LLM-based AI agents. We applaud Cadence’s ongoing innovation in flexible and efficient processors, which are key to making edge AI and vision widely deployable.”
The Tensilica NeuroEdge 130 AICP is supported by the Cadence NeuroWeave Software Development Kit (SDK), a single SDK used across all of Cadence’s AI IP. The Tensilica NeuroEdge 130 AICP includes a lightweight AI library that enables developers to program AI layers on the processor, reducing reliance on compiler frameworks and avoiding associated overhead.
Availability
The Tensilica NeuroEdge 130 AICP is available and is ISO 26262-ready for the automotive market.
Source: Cadence Design Systems, Inc.
About Cadence
Cadence Design Systems, Inc. is a U.S.-based technology company specializing in electronic design automation (EDA) software, hardware, and intellectual property (IP) solutions. Founded in 1988 through the merger of SDA Systems and ECAD, Cadence is headquartered in San Jose, CA. The company serves industries such as semiconductors, automotive, aerospace and defense, consumer electronics, and telecommunications. Cadence’s offerings include tools for designing integrated circuits, systems on chips (SoCs), printed circuit boards (PCBs), and complete electronic systems. As of 2024, Cadence reported annual revenue of approximately $4.64 billion and employed around 12,703 people worldwide. The company’s comprehensive solutions support the development of advanced electronic products across various sectors.